Fixed AMD x86-64 support in scalers asm routines
git-svn-id: svn://svn.code.sf.net/p/sc2/code/trunk@2360 8092fc87-c524-0410-9efc-e669fe64eaf9
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avolkov
@@ -88,17 +88,6 @@ SCALE_(PlatInit) (void)
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// mm0 will be kept == 0 throughout
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// 0 is needed for bytes->words unpack instructions
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pxor mm0, mm0
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// mm5-mm7 contains RGB->YUV mults
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movq mm7, mmx_Y_mult
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movq mm6, mmx_U_mult
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movq mm5, mmx_V_mult
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#ifdef USE_YUV_LOOKUP
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// mm6 contains RGB888->555 shuffle mult
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movq mm6, mmx_888to555_mult
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// mm5 contains DiffYUV threshold
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movq mm5, mmx_YUV_threshold
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#endif
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}
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}
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@@ -496,6 +485,22 @@ SCALE_(Blend_bilinear) (const Uint32* row0, const Uint32* row1,
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# define PREFETCH(addr)
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#endif
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#if defined(__x86_64__)
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# define A_REG "rax"
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# define D_REG "rdx"
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# define CLR_UPPER32(r) "xor " "%%" r "," "%%" r
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# define OFFSETABLE_PTR(p) "r" (p)
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# define MOVD_WMO(base, ofs, mult, dst) \
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"movd " "(" #base "," ofs "," #mult ")," #dst
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#else
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# define A_REG "eax"
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# define D_REG "edx"
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# define CLR_UPPER32(r)
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# define OFFSETABLE_PTR(p) "o" (*(p))
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# define MOVD_WMO(base, ofs, mult, dst) \
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"movd " #base "(," ofs "," #mult ")," #dst
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#endif
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static inline void
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SCALE_(PlatInit) (void)
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{
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@@ -504,20 +509,8 @@ SCALE_(PlatInit) (void)
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// 0 is needed for bytes->words unpack instructions
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"pxor %%mm0, %%mm0 \n\t"
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// mm5-mm7 contains RGB->YUV mults
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"movq %0, %%mm7 \n\t"
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"movq %1, %%mm6 \n\t"
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"movq %2, %%mm5 \n\t"
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#ifdef USE_YUV_LOOKUP
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// mm6 contains RGB888->555 shuffle mult
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"movq %3, %%mm6 \n\t"
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// mm5 contains DiffYUV threshold
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"movq %4, %%mm5 \n\t"
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#endif
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: /* nothing */
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: /*0*/"m" (mmx_Y_mult), /*1*/"m" (mmx_U_mult), /*2*/"m" (mmx_V_mult)
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, /*3*/"m" (mmx_888to555_mult), /*4*/"m" (mmx_YUV_threshold)
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: /* nothing */
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);
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}
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@@ -631,12 +624,14 @@ SCALE_(CmpYUV) (Uint32 pix1, Uint32 pix2, int toler)
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// convert RGB888 to 555
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// this is somewhat parallelized
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"punpcklbw %%mm0, %%mm1 \n\t"
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CLR_UPPER32 (A_REG) "\n\t"
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"psrlw $3, %%mm1 \n\t" // 8->5 bit
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"punpcklbw %%mm0, %%mm3 \n\t"
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"psrlw $3, %%mm3 \n\t" // 8->5 bit
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"pmaddwd %4, %%mm1 \n\t" // shuffle into the right channel order
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"movq %%mm1, %%mm2 \n\t" // finish shuffling
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"pmaddwd %4, %%mm3 \n\t" // shuffle into the right channel order
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CLR_UPPER32 (D_REG) "\n\t"
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"movq %%mm3, %%mm4 \n\t" // finish shuffling
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"punpckhdq %%mm0, %%mm2 \n\t" // ditto
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"por %%mm2, %%mm1 \n\t" // ditto
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@@ -646,9 +641,11 @@ SCALE_(CmpYUV) (Uint32 pix1, Uint32 pix2, int toler)
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// lookup the YUV vector
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"movd %%mm1, %%eax \n\t"
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"movd %%mm3, %%edx \n\t"
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"movd %3(,%%eax,4), %%mm1 \n\t"
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//movd (%3, %%eax, 4), %%mm1
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MOVD_WMO (%3, "%%" A_REG, 4, %%mm1) "\n\t"
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"movq %%mm1, %%mm4 \n\t"
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"movd %3(,%%edx,4), %%mm2 \n\t"
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//movd (%3, %%edx, 4), %%mm2
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MOVD_WMO (%3, "%%" D_REG, 4, %%mm2) "\n\t"
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// get abs difference between YUV components
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#ifdef USE_PSADBW
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@@ -675,8 +672,9 @@ SCALE_(CmpYUV) (Uint32 pix1, Uint32 pix2, int toler)
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#endif /* USE_PSADBW */
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: /*0*/"=r" (delta)
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: /*1*/"rm" (pix1), /*2*/"rm" (pix2),
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/*3*/"m" (*RGB15_to_YUV), /*4*/"m" (mmx_888to555_mult)
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: "%eax", "%edx"
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/*3*/OFFSETABLE_PTR(RGB15_to_YUV),
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/*4*/"m" (mmx_888to555_mult)
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: "%" A_REG, "%" D_REG
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);
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return (delta << 1) <= toler;
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@@ -700,21 +698,22 @@ SCALE_(DiffYUV) (Uint32 yuv1, Uint32 yuv2)
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// abs difference between channels
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"psubusb %%mm2, %%mm1 \n\t"
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"psubusb %%mm4, %%mm2 \n\t"
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CLR_UPPER32(D_REG) "\n\t"
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"por %%mm2, %%mm1 \n\t"
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// compare to threshold
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"psubusb %3, %%mm1 \n\t"
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"movd %%mm1, %%edx \n\t"
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// transform eax to 0 or ~0
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"xor %%eax, %%eax \n\t"
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"or %%edx, %%edx \n\t"
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"xor %%" A_REG ", %%" A_REG "\n\t"
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"or %%" D_REG ", %%" D_REG "\n\t"
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"setz %%al \n\t"
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"dec %%eax \n\t"
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"dec %%" A_REG " \n\t"
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: /*0*/"=a" (ret)
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: /*1*/"rm" (yuv1), /*2*/"rm" (yuv2),
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/*3*/"m" (mmx_YUV_threshold)
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: "%edx"
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: "%" D_REG
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);
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return ret;
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}
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@@ -783,11 +782,17 @@ SCALE_(Blend_bilinear) (const Uint32* row0, const Uint32* row1,
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MOVNTQ (%%mm3, (%2,%3,4)) "\n\t" // EL4/5: store 2 pixels
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: /* nothing */
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: /*0*/"m" (*row0), /*1*/"m" (*row1), /*2*/"r" (dst_p), /*3*/"r" (dlen)
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: /*0*/"m" (*row0), /*1*/"m" (*row1), /*2*/"r" (dst_p),
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/*3*/"r" ((unsigned long)dlen) /* 'long' is for proper reg alloc on amd64 */
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: "memory"
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);
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}
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#undef A_REG
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#undef D_REG
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#undef CLR_UPPER32
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#undef OFFSETABLE_PTR
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#endif // GCC_ASM
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#endif /* SCALEMMX_H_ */
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