runtime(systemverilog): Add syntax highlighting for 1800-2023 block strings
closes: #18056 Signed-off-by: Ayan Banerjee <ayanbanrj@gmail.com> Signed-off-by: Christian Brabandt <cb@256bit.org>
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Christian Brabandt
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@ -1,7 +1,8 @@
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" Vim syntax file
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" Vim syntax file
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" Language: SystemVerilog
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" Language: SystemVerilog
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" Maintainer: kocha <kocha.lsifrontend@gmail.com>
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" Maintainer: kocha <kocha.lsifrontend@gmail.com>
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" Last Change: 12-Aug-2013.
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" Last Change: 12-Aug-2013.
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" 2025 Aug 20 by Vim project: Add IEE1800-2023 block #18056
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" quit when a syntax file was already loaded
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" quit when a syntax file was already loaded
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if exists("b:current_syntax")
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if exists("b:current_syntax")
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@ -68,6 +69,9 @@ syn keyword systemverilogConditional unique0
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syn keyword systemverilogStatement implements
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syn keyword systemverilogStatement implements
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syn keyword systemverilogStatement interconnect soft nettype
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syn keyword systemverilogStatement interconnect soft nettype
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" IEEE1800-2023 add
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syn region systemverilogBlockString start=+"""+ end=+"""+ contains=verilogEscape,@Spell
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" Define the default highlighting.
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" Define the default highlighting.
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" The default highlighting.
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" The default highlighting.
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@ -78,6 +82,7 @@ hi def link systemverilogRepeat Repeat
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hi def link systemverilogLabel Label
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hi def link systemverilogLabel Label
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hi def link systemverilogGlobal Define
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hi def link systemverilogGlobal Define
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hi def link systemverilogNumber Number
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hi def link systemverilogNumber Number
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hi def link systemverilogBlockString String
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let b:current_syntax = "systemverilog"
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let b:current_syntax = "systemverilog"
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